uC/OS-II Kernel Included With the LatticeMico32 Development Tools HILLSBORO, OR--Oct 23, 2006 -- Lattice Semiconductor Corporation today announced the availability of Real-Time Operating System (RTOS) ...

- New contract advances CAES Gaisler Product portfolio to include a 16-core RISC-V platform that will enable the next generation of space-grade fault- and radiation-tolerant microprocessors.

CAES, a leader in advanced mission-critical electronics, has been awarded a contract with the European Space Agency (ESA) to develop a fault- and radiation-tolerant system-on-chip. Funded by the ...

India has formally introduced DHRUV64, a 64-bit, dual-core microprocessor based on the RISC-V instruction set, developed by the Centre for Development of Advanced Computing (C-DAC) under the national ...

SAN FRANCISCO – Hewlett-Packard Co. (HP) is getting out of the chip-making business. The Palo Alto, California, company on Thursday announced that it reached an agreement with Intel Corp. that would ...

Hewlett-Packard Co. (HP) is getting out of the chip-making business. The Palo Alto, California, company on Thursday announced that it reached an agreement with Intel Corp. that would see HP’s Itanium ...