IEEE

Modeling Non-Uniformity During Two-Step Dry Etching of Si/SiGe Stacks for Gate-All-Around FETs

Abstract: Selective lateral etching of the SiGe layers is one of the most critical steps in Gate-All-Around Field-Effect Transistor (GAAFET) fabrication, which is the basis for the formation of an ...
IEEE

Study on Low Power Back-Side Deep Trench Isolation Etching on Stack-BSI CMOS Image Sensor

Abstract: The leakage of pixel is a significant index to characterize quality of CMOS image sensor (CIS), which is classified into white pixel (WP) and dark current (DC) in the yield test. It is ...