Analyzing data reuse for cache reconfiguration, ACM Transactions on Embedded Computing Systems (TECS) | DeepDyve
deepdyve.com
Analyzing data reuse for cache reconfiguration, ACM Transactions on Embedded Computing Systems (TECS) | DeepDyve
Classical compiler optimizations assume a fixed cache architecture and modify the program to take best advantage of it. In some cases, this may not be the best strategy because each nest might work best with a different cache configuration and transforming a nest for a given fixed cache configuration may not be possible due to data and control ...
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